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F. J. Hill, Department of Electrical Engineering, University of Arizona, Tucson, AZ 85721
R. E. Swanson, Department of Electrical Engineering, University of Arizona, Tucson, AZ 85721
M. Masud, Department of Electrical Engineering, University of Arizona, Tucson, AZ 85721
Z. Navabi, Department of Electrical Engineering, University of Arizona, Tucson, AZ 85721
This correspondence describes the extension and formalization of the hardware description language AHPL to form AHPL III. This language provides for nesting AHPL descriptions within descriptions. It incorporates a general index extension mechanism which permits the efficient representation of sets of duplicate descriptions of any complexity. Three types of structures, procedural structures, functional registers, and combinational logic units are permitted. Procedural structures may be primitive or nonprimitive. All but primitive procedural structures share a common syntax. Nesting, declaration, and invocation rules for these distinct structures are specified in a semantics table.
Index Terms:
wire list,Design automation,digital simulation,hardware,hardware compiler,hardware description,hardware language,language,register transfer language
Citation:
F. J. Hill, R. E. Swanson, M. Masud, Z. Navabi, "Structure specification with a procedural hardware description language," IEEE Transactions on Computers, vol. 30, no. 2, pp. 157-161, Feb. 1981, doi:10.1109/TC.1981.6312183
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