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Feb. 1981 (vol. 30 no. 2)
pp. 148-153
ASCII Text
x 
 
Charles B. Silio, James H. Pugsley, B. Albert Jeng, "Control memory word width optimization using multiple-valued circuits," IEEE Transactions on Computers, vol. 30, no. 2, pp. 148-153, Feb., 1981.
 
 
BibTex
x
 
@article{ 10.1109/TC.1981.6312180,
author = {Charles B. Silio and James H. Pugsley and B. Albert Jeng},
title = {Control memory word width optimization using multiple-valued circuits},
journal ={IEEE Transactions on Computers},
volume = {30},
number = {2},
issn = {0018-9340},
year = {1981},
pages = {148-153},
doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1981.6312180},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - JOUR
JO - IEEE Transactions on Computers
TI - Control memory word width optimization using multiple-valued circuits
IS - 2
SN - 0018-9340
SP148
EP153
EPD - 148-153
A1 - Charles B. Silio,
A1 - James H. Pugsley,
A1 - B. Albert Jeng,
PY - 1981
KW - read-only memory
KW - Control store width
KW - horizontal microprogramming
KW - linear programming
KW - microword length optimization
KW - multilevel I<sup>2</sup>L circuits
KW - multiple-valued logic
VL - 30
JA - IEEE Transactions on Computers
ER -
 
Charles B. Silio, Electrical Engineering Department, University of Maryland, College Park, MD 20742
James H. Pugsley, Electrical Engineering Department, University of Maryland, College Park, MD 20742
B. Albert Jeng, Computer Sciences Corporation, Falls Church, VA 22046
The optimization of read-only memory (ROM) digit dimension for microprogrammed digital computers is considered. The design of integrated injection logic (I2L) multiple-valued ROM's is reviewed and designs for corresponding digit-line decoders are presented. Results are presented for determining microoperation groupings that achieve the lower bound digit dimension for multivalued encodings, thus extending to arbitrary radix the theory for the binary case. To illustrate the applicability of these results, the microprogram specifications for previously published optimization examples, as well as that for the Digital Equipment Corporation PDP-9, are shown to have optimal encodings using either three- or four-valued ROM's and either ternary- or quaternary-to-binary decoders, resulting in dramatic savings in device count for the control memory portion of the corresponding machine.
Index Terms:
read-only memory,Control store width,horizontal microprogramming,linear programming,microword length optimization,multilevel I<sup>2</sup>L circuits,multiple-valued logic
Citation:
Charles B. Silio, James H. Pugsley, B. Albert Jeng, "Control memory word width optimization using multiple-valued circuits," IEEE Transactions on Computers, vol. 30, no. 2, pp. 148-153, Feb. 1981, doi:10.1109/TC.1981.6312180
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