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| Leslie G. Valiant, "Universality considerations in VLSI circuits," IEEE Transactions on Computers, vol. 30, no. 2, pp. 135-140, Feb., 1981. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1981.6312176, author = {Leslie G. Valiant}, title = {Universality considerations in VLSI circuits}, journal ={IEEE Transactions on Computers}, volume = {30}, number = {2}, issn = {0018-9340}, year = {1981}, pages = {135-140}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1981.6312176}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Universality considerations in VLSI circuits IS - 2 SN - 0018-9340 SP135 EP140 EPD - 135-140 A1 - Leslie G. Valiant, PY - 1981 KW - VLSI KW - Area minimization KW - circuits KW - embeddings KW - graphs KW - universality VL - 30 JA - IEEE Transactions on Computers ER - | |||
The problem of embedding the interconnection pattern of a circuit into a two-dimensional surface of minimal area is discussed. Since even for some natural patterns graphs containing m connections may require Ω(m2) area, in order to achieve compact embeddings restricted classes of graphs have to be considered. For example, arbitrary trees (of bounded degree) can be embedded in linear area without edges crossing over. Planar graphs can be embedded efficiently only if crossovers are allowed in the embedding.
Index Terms:
VLSI,Area minimization,circuits,embeddings,graphs,universality
Citation:
Leslie G. Valiant, "Universality considerations in VLSI circuits," IEEE Transactions on Computers, vol. 30, no. 2, pp. 135-140, Feb. 1981, doi:10.1109/TC.1981.6312176
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