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Composite Parallel Counters
October 1980 (vol. 29 no. 10)
pp. 942-946
L. Dadda, Istituto di Elettrotecnica ed Elettronica Politecnico di Milano
A graphical representation is presented for parallel counters, i.e., multiple input combinatorial modules that count the number of inputs being in a given state (normally logic ONE).
Index Terms:
response counters, Associative processors, carry-shower counters, digital counters, multiple input adders, parallel counter networks, parallel counters, parallel multipliers
Citation:
L. Dadda, "Composite Parallel Counters," IEEE Transactions on Computers, vol. 29, no. 10, pp. 942-946, Oct. 1980, doi:10.1109/TC.1980.1675481
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