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Reliability and Performance of Error-Correcting Memory and Register Arrays
October 1980 (vol. 29 no. 10)
pp. 920-927
S.A. Elkind, Department of Electrical Engineering, Carnegie- Mellon University
A brief survey of memory chip failure modes shows that partial chip failures are the dominant failure mode. A single error-correcting (SEC) code memory model is developed based on the results of the survey. The effect of memory support circuitry, often ignored, is included. Examples illustrate that the support circuitry dominates the memory system reliability for wide ranges of memory system parameters.
Index Terms:
reliability, Error-correcting codes, fault tolerance, memory, performance
Citation:
S.A. Elkind, D.P. Siewiorek, "Reliability and Performance of Error-Correcting Memory and Register Arrays," IEEE Transactions on Computers, vol. 29, no. 10, pp. 920-927, Oct. 1980, doi:10.1109/TC.1980.1675475
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