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Conditional-Sum Early Completion Adder Logic
August 1980 (vol. 29 no. 8)
pp. 753-756
N.M. Martin, Applied Research Laboratories, University of Texas
A high-speed parallel adder of digitally represented numbers called the conditional-sum early completion adder (CSCA) will be described. The CSCA design is based on the computation of "conditional" sums, carries, and column completion detection logic.
Index Terms:
high speed adder, Addition, compute arithmetic, conditional-sum adder, CSA, end-around carry
Citation:
N.M. Martin, S.P. Hufnagel, "Conditional-Sum Early Completion Adder Logic," IEEE Transactions on Computers, vol. 29, no. 8, pp. 753-756, Aug. 1980, doi:10.1109/TC.1980.1675663
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