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A Dynamically Microprogrammable Computer with Low-Level Parallelism
July 1980 (vol. 29 no. 7)
pp. 577-595
H. Hagiwara, Department of Information Science, Kyoto University
A new microprogrammable computer with low-level parallelism was built and has been utilized as a research vehicle for solving different classes of research-oriented applications such as real-time processings on static/dynamic images, pictures and signals, and emulations of both existing and virtual machines including high (intermediate) level language machines. The design goal of the machine was to achieve a high degree of processing enhancement in research- oriented applications by means of a low-level parallel processing organization combined with dynamically microprogrammable control. The machine has the capability to process multiple data streams, performing parallel operations with four 16-bit ALU's. These ALU's are independently controlled by the different fields of a 160-bit horizontal-type microinstruction, and have simultaneous access to 15 working registers. This microprogrammed MIMD organization is expected to provide a greater degree of flexibility for low-level parallel processing. In addition, not only does the machine contain powerful ALU's and a large number of registers, but also it employs flexible control structures and a hierarchical organization of control storage. All of these combine to yield extensive microprogramming capability which the user can effectively tailor to a wide spectrum of applications.
Index Terms:
virtual control storage, Computer animation, emulation, firmware, microprogramming, parallel processing, real-time applications
Citation:
H. Hagiwara, S. Tomita, S. Oyanagi, K. Shibayama, "A Dynamically Microprogrammable Computer with Low-Level Parallelism," IEEE Transactions on Computers, vol. 29, no. 7, pp. 577-595, July 1980, doi:10.1109/TC.1980.1675629
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