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Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor
June 1980 (vol. 29 no. 6)
pp. 532-537
| ASCII Text | x | ||
| Y. Crouzet, C. Landrault, "Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor," IEEE Transactions on Computers, vol. 29, no. 6, pp. 532-537, June, 1980. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1980.1675615, author = {Y. Crouzet and C. Landrault}, title = {Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor}, journal ={IEEE Transactions on Computers}, volume = {29}, number = {6}, issn = {0018-9340}, year = {1980}, pages = {532-537}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1980.1675615}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor IS - 6 SN - 0018-9340 SP532 EP537 EPD - 532-537 A1 - Y. Crouzet, A1 - C. Landrault, PY - 1980 KW - self-checking LSI circuits KW - Coding KW - fault detection KW - self-checking VL - 29 JA - IEEE Transactions on Computers ER - | |||
Self-checking approaches developed so far deal with a gate level representation of logical circuits. They do not account for constraints which may result from an implementation by integrated circuits. This paper is concerned with such practical problems and their respective significance.
Index Terms:
self-checking LSI circuits, Coding, fault detection, self-checking
Citation:
Y. Crouzet, C. Landrault, "Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor," IEEE Transactions on Computers, vol. 29, no. 6, pp. 532-537, June 1980, doi:10.1109/TC.1980.1675615
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