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Issue No.05 - May (1980 vol.29)
pp: 410-416
J. Savir , IBM T. J. Watson Research Center
Intermittent faults in combinational circuits may appear and disappear randomly; hence, their detection requires many repeated applications of test vectors. Since testing reduces the time available for computation, it is necessary to efficiently minimize the time required for a test, while still achieving a high degree of fault detection.
random testing, Error latency, intermittent fault detection, irredundant circuit, maximum likelihood estimator
J. Savir, "Testing for Single Intermittent Failures in Combinational Circuits by Maximizing the Probability of Fault Detection", IEEE Transactions on Computers, vol.29, no. 5, pp. 410-416, May 1980, doi:10.1109/TC.1980.1675595
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