• Publication
  • 1980
  • Issue No. 5 - May
  • Abstract - Testing for Single Intermittent Failures in Combinational Circuits by Maximizing the Probability of Fault Detection
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Testing for Single Intermittent Failures in Combinational Circuits by Maximizing the Probability of Fault Detection
May 1980 (vol. 29 no. 5)
pp. 410-416
J. Savir, IBM T. J. Watson Research Center
Intermittent faults in combinational circuits may appear and disappear randomly; hence, their detection requires many repeated applications of test vectors. Since testing reduces the time available for computation, it is necessary to efficiently minimize the time required for a test, while still achieving a high degree of fault detection.
Index Terms:
random testing, Error latency, intermittent fault detection, irredundant circuit, maximum likelihood estimator
Citation:
J. Savir, "Testing for Single Intermittent Failures in Combinational Circuits by Maximizing the Probability of Fault Detection," IEEE Transactions on Computers, vol. 29, no. 5, pp. 410-416, May 1980, doi:10.1109/TC.1980.1675595
Usage of this product signifies your acceptance of the Terms of Use.