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A High Data-Rate Digital Output Correlator Design
May 1980 (vol. 29 no. 5)
pp. 403-405
K.W. Current, Department of Electrical Engineering, University of California
A high data-rate digital output correlator integrated circuit design which uses new synchronous sequential quaternary threshold logic gates is proposed and compared to the all-binary equivalent realization of this function. Substantial integrated circuit device count and die area savings are projected for the multiple valued logic realization.
Index Terms:
threshold logic, Digital correlators, latched quaternary threshold logic full adders, multiple valued logic, parallel counters
Citation:
K.W. Current, "A High Data-Rate Digital Output Correlator Design," IEEE Transactions on Computers, vol. 29, no. 5, pp. 403-405, May 1980, doi:10.1109/TC.1980.1675592
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