|
| This Article | ||
| ||
| Share | ||
| Bibliographic References | ||
| Add to: | ||
 Digg  Furl  Spurl  Blink  Simpy  Google  Del.icio.us  Y!MyWeb | ||
| Search | ||
| ||
An Analysis of Instruction-Fetching Strategies in Pipelined Computers
April 1980 (vol. 29 no. 4)
pp. 325-329
| ASCII Text | x | ||
| R.W. Holgate, R.N. Ibbett, "An Analysis of Instruction-Fetching Strategies in Pipelined Computers," IEEE Transactions on Computers, vol. 29, no. 4, pp. 325-329, April, 1980. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1980.1675572, author = {R.W. Holgate and R.N. Ibbett}, title = {An Analysis of Instruction-Fetching Strategies in Pipelined Computers}, journal ={IEEE Transactions on Computers}, volume = {29}, number = {4}, issn = {0018-9340}, year = {1980}, pages = {325-329}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1980.1675572}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - An Analysis of Instruction-Fetching Strategies in Pipelined Computers IS - 4 SN - 0018-9340 SP325 EP329 EPD - 325-329 A1 - R.W. Holgate, A1 - R.N. Ibbett, PY - 1980 KW - prefetching KW - Control point KW - control transfers KW - instruction accessing KW - jump prediction KW - loop catching KW - pipelined processor VL - 29 JA - IEEE Transactions on Computers ER - | |||
The performance of pipelined processors is heavily influenced by the effects of control-transfer, or branching, instructions, and various strategies have been used to reduce the delays incurred by these instructions. The position of the "control point" in the pipeline is an important factor that must also be taken into account, however, and this paper presents an analysis of its effects. Results are given of measurements made with a hardware performance monitor during the running of benchmark programs on the highly pipelined MU5 processor. These results support the argument for placing the control point as late in the pipeline as possible, and for using a prediction mechanism to supply correct sequences of instructions to the pipeline.
Index Terms:
prefetching, Control point, control transfers, instruction accessing, jump prediction, loop catching, pipelined processor
Citation:
R.W. Holgate, R.N. Ibbett, "An Analysis of Instruction-Fetching Strategies in Pipelined Computers," IEEE Transactions on Computers, vol. 29, no. 4, pp. 325-329, April 1980, doi:10.1109/TC.1980.1675572
Usage of this product signifies your acceptance of the Terms of Use.