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April 1980 (vol. 29 no. 4)
pp. 278-287
A.P. Reeves, School of Electrical Engineering, Purdue University
A class of binary array processors (BAP) have evolved over the past 20 years primarily intended for image-processing applications. The advent of large-scale integrated-circuit technology makes the construction of these processors feasible. In this paper three basic instruction types that characterize a BAP are defined and the systematic design of a processor called BASE is described in detail. Two forms of BASE are discussed, a fully parallel version and an add-on unit for a conventional computer. The systematic design has enabled an assembly language with a simple, APL-like syntax to be developed. Several program examples to illustrate features of the processor are given.
Index Terms:
parallel processing, Binary images, computer architecture, image processing, near-neighborhood operation
A.P. Reeves, "A Systematically Designed Binary Array Processor," IEEE Transactions on Computers, vol. 29, no. 4, pp. 278-287, April 1980, doi:10.1109/TC.1980.1675566
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