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April 1979 (vol. 28 no. 4)
pp. 300-306
null Kai Hwang, School of Electrical Engineering, Purdue University
Two new families of LSI iterative logic arrays are proposed to perform two's complement multiplication based on the Baugh?Wooley algorithm [2]. The global approach is faster and attractive for LSI but limited in size due to current monolithic and packaging technology. The modular approach is better suited to realizing arbitrarily large array multipliers at only slight decrease in speed. The proposed additive multiply modules can be externally programmed by hardwiring to multiply binary numbers in either two's complement or unsigned format. No peripheral logic circuits such as Wallace trees or complementers are needed in constructing the proposed modular multiplication networks. Speed analysis, hardware complexity, packaging, and application requirements of the proposed array multipliers are also provided.
Index Terms:
two's complement multiplication., Additive multiply modules, cellular array multipliers, computer arithmetic, two's complement multiplication, LSI arithmetic arrays, multiplication networks, pipelined arithmetic design
Citation:
null Kai Hwang, "Global and Modular Two's Complement Cellular Array Multipliers," IEEE Transactions on Computers, vol. 28, no. 4, pp. 300-306, April 1979, doi:10.1109/TC.1979.1675350
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