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R. Nair, IBM Thomas J. Watson Research Center
An efficient, optimal test sequence for detecting multiple stuck-at faults in random access memories (RAM's) for any decoder implementation is presented. Another algorithm which does not assume any particular wired logic behavior of simultaneously accessed storage locations, is also presented.
Index Terms:
wired logic behavior, Arbitrary decoder implementation, fault detection, multiple stuck-at faults, optimal algorithm, random access memories
Citation:
R. Nair, "Comments on "An Optimal Algorithm for Testing Stuck-at Faults in Random Access Memories"," IEEE Transactions on Computers, vol. 28, no. 3, pp. 258-261, March 1979, doi:10.1109/TC.1979.1675331
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