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Positive Fail-Safe Realization of Synchronous Sequential Machines
February 1979 (vol. 28 no. 2)
pp. 167-172
C. Halatsis, Digital Systems Laboratory, Computer Center, Nuclear Research Center Democritos
The correspondence deals with the fail-safe realization of synchronous sequential machines under the assumption that the next-state functions are in any positive form. This leads to new classes of assignments called positive fail-safe assignment's (PFSA) The feasibility conditions of such assignments are given and systematic procedures are presented for deriving them using k-out-of-n codes.
Index Terms:
sequential machines, Covering set, destination set, fail-safe, k-out-of-n code, positive fail-safe assignment, positive realization, realization free
Citation:
C. Halatsis, N. Gaitanis, "Positive Fail-Safe Realization of Synchronous Sequential Machines," IEEE Transactions on Computers, vol. 28, no. 2, pp. 167-172, Feb. 1979, doi:10.1109/TC.1979.1675309
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