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A.S. Sethi, Computer Science Program, Indian Institute of Technology
Past studies of memory interference in multiprocessor systems have generally assumed that the references of each processor are uniformly distributed among the memory modules. In this paper we develop a model with local referencing, which reflects more closely the behavior of real-life programs. This model is analyzed using Markov chain techniques and expressions are derived for the multiprocessor performance. New expressions are also obtained for the performance in the traditional uniform reference model and are compared with other expressions-available in the literature. Results of a simulation study are given to show the accuracy of the expressions for both models.
Index Terms:
simulation, Markov chain models, memory interference, multiprocessors, performance evaluation
Citation:
A.S. Sethi, N. Deo, "Interference in Multiprocessor Systems with Localized Memory Access Probabilities," IEEE Transactions on Computers, vol. 28, no. 2, pp. 157-163, Feb. 1979, doi:10.1109/TC.1979.1675307
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