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June 1978 (vol. 27 no. 6)
pp. 509-516
S.B. Akers, Electronics Laboratory, General Electric
This paper describes a method for defining, analyzing, testing, and implementing large digital functions by means of a binary decision diagram. This diagram provides a complete, concise, "implementation-free" description of the digital functions involved. Methods are described for deriving these diagrams and examples are given for a number of basic combinational and sequential devices. Techniques are then outlined for using the diagrams to analyze the functions involved, for test generation, and for obtaining various implementations. It is shown that the diagrams are especially suited for processing by a computer. Finally, methods are described for introducing inversion and for directly "interconnecting" diagrams to define still larger functions. An example of the carry look-ahead adder is included.
Index Terms:
test generation, Binary decision diagrams, digital functions, logical analysis, logic diagrams, logic synthesis
S.B. Akers, "Binary Decision Diagrams," IEEE Transactions on Computers, vol. 27, no. 6, pp. 509-516, June 1978, doi:10.1109/TC.1978.1675141
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