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Theoretical Limitations on the Efficient Use of Parallel Memories
May 1978 (vol. 27 no. 5)
pp. 421-428
H.D. Shapiro, Sperry Research Center
The effective utilization of single-instruction-multiple-data stream machines depends heavily on being able to arrange the data elements of arrays in parallel memory modules so that memory conflicts are avoided when the data are fetched. Several classes of storage algorithms are presented. Necessary and sufficient conditions are derived which can be used to determine if all conflict can be avoided. For the matrix subparts most often demanded in numerical analysis computations, whenever the class of storage algorithms called periodic skewing schemes provides conflict-free access, the subclass called linear skewing schemes also provides such access.
Index Terms:
skewing schemes, Array processors, memory-processor connection networks, parallel memories, SIMD machines
Citation:
H.D. Shapiro, "Theoretical Limitations on the Efficient Use of Parallel Memories," IEEE Transactions on Computers, vol. 27, no. 5, pp. 421-428, May 1978, doi:10.1109/TC.1978.1675122
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