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Autotesting Speed-Independent Sequential Circuits
January 1978 (vol. 27 no. 1)
pp. 90-94
G. Cioffi, Istituto di Automatica, University of Rome
Speed-independent sequential circuits are characterized by an input-output behavior which is independent of the actual delays of the circuitry; this means that any unbounded delay is allowed in the component gates. This performance is accomplished by means of a control circuit which recognizes when the circuit is ready to accept a next input datum, and therefore a speed independent synthesis is realizable if and only if the input source can be controlled by the circuit itself.
Index Terms:
speed-independent network, Autotesting, fail safe, machine, modular, self-synchronizing, sequential network
Citation:
G. Cioffi, "Autotesting Speed-Independent Sequential Circuits," IEEE Transactions on Computers, vol. 27, no. 1, pp. 90-94, Jan. 1978, doi:10.1109/TC.1978.1674959
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