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March 1977 (vol. 26 no. 3)
pp. 292-294
L. Sintonen, Department of Electronics, Tampere University of Technology
A multivalued flip-flop is presented. The implementation of the flip-flop is independent of N (number of logic levels). The output of the flip-flop is stable during clock transitions. Techniques in the design of sequential circuits using this type of multivalued flip-flops are presented.
Index Terms:
N-valued logic design, N-valued logic devices, N-state flip-flop, multivalued flip-flop, multivalued sequential circuits.
Citation:
L. Sintonen, "A Clocked Multivalued Flip-Flop," IEEE Transactions on Computers, vol. 26, no. 3, pp. 292-294, March 1977, doi:10.1109/TC.1977.1674823
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