This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Design of Ternary COS/MOS Memory and Sequential Circuits
March 1977 (vol. 26 no. 3)
pp. 281-288
H.T. Mouftah, Department of Electrical Engineering, University of Toronto
Ternary storage elements are realized using ternary operators and fundamental circuits, designed with the COS/MOS integrated circuits. Several ternary flip-flops (tri-flops) are constructed and described in detail: the PZN (set positive, set zero, and set negative), the clocked PZN, the D-type, and the T-type. Ternary shift registers and ring counter are formed by means of these tri-flops. A maste
Index Terms:
COS/MOS integrated circuits, fundamental ternary circuits, multiple-valued logic, programmable divide-by-N counters, ternary counters, ternary flip-flops, ternary logic implementation, ternary memory cells, ternary sequential logic.
Citation:
H.T. Mouftah, I.B. Jordan, "Design of Ternary COS/MOS Memory and Sequential Circuits," IEEE Transactions on Computers, vol. 26, no. 3, pp. 281-288, March 1977, doi:10.1109/TC.1977.1674821
Usage of this product signifies your acceptance of the Terms of Use.