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Issue No.03 - March (1977 vol.26)
pp: 276-278
W.H. Ninke , Bell Laboratories
Novel implementations of a binary rate multiplier (BRM) circuit are described. These BRM's, which use the input data word to load patterns into shift registers, are capable of working at higher speed than a conventional circuit, and should be more suitable for silicon integration. Long input data words can be accommodated with a long shift register or by interconnecting several short registers.
Binary rate multipliers (BRM's), code conversion, logic design, shift registers, vector generation.
W.H. Ninke, G.R. Ritchie, "Shift Register Binary Rate Multipliers", IEEE Transactions on Computers, vol.26, no. 3, pp. 276-278, March 1977, doi:10.1109/TC.1977.1674819
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