|
| This Article | ||
| ||
| Share | ||
| Bibliographic References | ||
| Add to: | ||
| | ||
| Search | ||
| ||
Modeling and Digital Simulation for Design Verification and Diagnosis
December 1976 (vol. 25 no. 12)
pp. 1242-1253
| ASCII Text | x | ||
| S.A. Szygenda, E.W. Thompson, "Modeling and Digital Simulation for Design Verification and Diagnosis," IEEE Transactions on Computers, vol. 25, no. 12, pp. 1242-1253, December, 1976. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1976.1674591, author = {S.A. Szygenda and E.W. Thompson}, title = {Modeling and Digital Simulation for Design Verification and Diagnosis}, journal ={IEEE Transactions on Computers}, volume = {25}, number = {12}, issn = {0018-9340}, year = {1976}, pages = {1242-1253}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1976.1674591}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Modeling and Digital Simulation for Design Verification and Diagnosis IS - 12 SN - 0018-9340 SP1242 EP1253 EPD - 1242-1253 A1 - S.A. Szygenda, A1 - E.W. Thompson, PY - 1976 KW - Data structures KW - design verification KW - digital logic simulation KW - fault diagnosis KW - fault simulation KW - functional simulation. VL - 25 JA - IEEE Transactions on Computers ER - | |||
There are many activities included under the category of design automation for integrated circuits. Some of these activities include packaging, placement, routing, interactive graphics, device data bases, and digital simulation; for the purpose of logic verification, timing analysis, and diagnostic test verification. One might also include high-level simulation, such as register transfer simulation, for the purpose of initial logic verification. This paper will be oriented towards modeling and implementation questions which arise when one is attempting to implement an extremely accurate digital simulator for the purposes of logic and design verification and fault simulation. Simulators for these purposes are now extremely important and occupy a major role in any design automation system. These systems are also very expensive and therefore the incorrect answers to a variety of questions which arise during the process of developing such simulators can be disastrous. This paper shall attempt to acquaint the reader with questions that have arisen over the years in terms of developing these simulators and what some of the possible answers are, and their respective tradeoffs. Although the successes, and, equally the failures, of many people have contributed to the present state of the art of digital simulators, one particular simulator, the one the authors are most intimately involved with, will be used as a source of detailed examples demonstrating many of the questions to be discussed.
Index Terms:
Data structures, design verification, digital logic simulation, fault diagnosis, fault simulation, functional simulation.
Citation:
S.A. Szygenda, E.W. Thompson, "Modeling and Digital Simulation for Design Verification and Diagnosis," IEEE Transactions on Computers, vol. 25, no. 12, pp. 1242-1253, Dec. 1976, doi:10.1109/TC.1976.1674591
Usage of this product signifies your acceptance of the Terms of Use.

