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| ASCII Text | x | ||
| R.M.M. Oberman, "The J-K Gate," IEEE Transactions on Computers, vol. 25, no. 11, pp. 1156-1159, November, 1976. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1976.1674572, author = {R.M.M. Oberman}, title = {The J-K Gate}, journal ={IEEE Transactions on Computers}, volume = {25}, number = {11}, issn = {0018-9340}, year = {1976}, pages = {1156-1159}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1976.1674572}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - The J-K Gate IS - 11 SN - 0018-9340 SP1156 EP1159 EPD - 1156-1159 A1 - R.M.M. Oberman, PY - 1976 KW - Digital circuit design KW - EX-OR gate KW - inverter KW - J-K gate KW - latch KW - logic circuit KW - NAND gate KW - NIMP gate KW - OR gate KW - programmable gate circuit KW - standard gate KW - zero/one-true/complement element. VL - 25 JA - IEEE Transactions on Computers ER - | |||
For many years two-input NAND, AND, NOR, OR and EX-OR gates have been commercially available as cheap quad TTL integrated circuits (IC's). Ideas on quad programmable two-input gates (three inputs per gate) have been published in the literature but have not reached the commercial stage [1]. However, complicated and expensive arithmetic logic units (ALU's) programmable to perform 16 different functions on two 4-bit arguments have become commercially available. The four sections of ALU's are not individually programmable.
Index Terms:
Digital circuit design, EX-OR gate, inverter, J-K gate, latch, logic circuit, NAND gate, NIMP gate, OR gate, programmable gate circuit, standard gate, zero/one-true/complement element.
Citation:
R.M.M. Oberman, "The J-K Gate," IEEE Transactions on Computers, vol. 25, no. 11, pp. 1156-1159, Nov. 1976, doi:10.1109/TC.1976.1674572
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