Issue No.11 - November (1976 vol.25)
M. Mor , Department of Computer Science, Queens College of the City University of New York
The problem of the so-called "pessimistic" results, obtained by usingg three-valued (0,1,u) simulation for design verification of digital systems, is discussed. A complete three-valued model for the sequential portion of the digital systems is suggested. The conventional gate model is replaced by the new model, which reduces the problem considerably.
Partial synchronization, sequential circuit, simulation, synchronizing sequence, three-valued.
M. Mor, "On the Three-Valued Simulation of Digital Systems", IEEE Transactions on Computers, vol.25, no. 11, pp. 1152-1156, November 1976, doi:10.1109/TC.1976.1674571