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Implementation of Permutation Functions in Illiac IV-Type Computers
September 1976 (vol. 25 no. 9)
pp. 929-936
S.E. Orcutt, Bell Laboratories
Much research has recently been done on processor interconnection schemes for parallel computers. These interconnection schemes allow certain permutations to be performed in less than linear time, typically 0(log N), 0(log2N), or 0(vN) for a vector of N elements and N processors. In this paper we show that many permutations can also be performed in less than linear time on a machine wit
Index Terms:
Bit reversal, bitonic sorting, data routing, Illiac IV, parallel computation, perfect shuffle, permutations.
Citation:
S.E. Orcutt, "Implementation of Permutation Functions in Illiac IV-Type Computers," IEEE Transactions on Computers, vol. 25, no. 9, pp. 929-936, Sept. 1976, doi:10.1109/TC.1976.1674718
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