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A Nine-Valued Circuit Model for Test Generation
June 1976 (vol. 25 no. 6)
pp. 630-636
ASCII Text
x 
 
P. Muth, "A Nine-Valued Circuit Model for Test Generation," IEEE Transactions on Computers, vol. 25, no. 6, pp. 630-636, June, 1976.
 
 
BibTex
x
 
@article{ 10.1109/TC.1976.1674663,
author = {P. Muth},
title = {A Nine-Valued Circuit Model for Test Generation},
journal ={IEEE Transactions on Computers},
volume = {25},
number = {6},
issn = {0018-9340},
year = {1976},
pages = {630-636},
doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1976.1674663},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - JOUR
JO - IEEE Transactions on Computers
TI - A Nine-Valued Circuit Model for Test Generation
IS - 6
SN - 0018-9340
SP630
EP636
EPD - 630-636
A1 - P. Muth,
PY - 1976
KW - Circuit testing
KW - D-algorithm
KW - diagnosis
KW - many-valued model
KW - sequential circuit
KW - single and multiple faults
KW - test generation.
VL - 25
JA - IEEE Transactions on Computers
ER -
 
P. Muth, Brown, Boveri, and Cie AG
A nine-valued circuit model for test generation is introduced which takes care of multiple and repeated effects of a fault in sequential circuits. Using this model test sequences can be determined which allow multiple and repeated effects of faults on the internal state of a sequential circuit. Thus valid test sequences are derived where other known procedures, like the D-algorithm, do not find any test although one exists.
Index Terms:
Circuit testing, D-algorithm, diagnosis, many-valued model, sequential circuit, single and multiple faults, test generation.
Citation:
P. Muth, "A Nine-Valued Circuit Model for Test Generation," IEEE Transactions on Computers, vol. 25, no. 6, pp. 630-636, June 1976, doi:10.1109/TC.1976.1674663
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