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Issue No.10 - October (1975 vol.24)
pp: 1012-1014
S.C. Hu , Department of Electrical Engineering, Cleveland State University
ABSTRACT
Logic gates subject to asymmetric input faults may be made more reliable by employing redundant inputs. A mathematical expression for determining the optimum number of redundant inputs based on input reliabilities of the gate is developed. The development follows the theory of combinatorial probability.
INDEX TERMS
Asymmetric input-faults, input redundancy, logic gate, probability, reliability.
CITATION
S.C. Hu, "A Probabilistic Approach of Designing More Reliable Logic Gates with Asymmetric Input Faults", IEEE Transactions on Computers, vol.24, no. 10, pp. 1012-1014, October 1975, doi:10.1109/T-C.1975.224113
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