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Cellular Logic Array for HighSpeed Signed Binary Number Multiplication
September 1975 (vol. 24 no. 9)
pp. 932935
ASCII Text  x  
C.I. Toma, "Cellular Logic Array for HighSpeed Signed Binary Number Multiplication," IEEE Transactions on Computers, vol. 24, no. 9, pp. 932935, September, 1975.  
BibTex  x  
@article{ 10.1109/TC.1975.224340, author = {C.I. Toma}, title = {Cellular Logic Array for HighSpeed Signed Binary Number Multiplication}, journal ={IEEE Transactions on Computers}, volume = {24}, number = {9}, issn = {00189340}, year = {1975}, pages = {932935}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1975.224340}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Cellular Logic Array for HighSpeed Signed Binary Number Multiplication IS  9 SN  00189340 SP932 EP935 EPD  932935 A1  C.I. Toma, PY  1975 KW  Fourbit arithmetic logic unit MC10181 KW  highspeed 4 X 2 multiplier chip KW  multiplication cellular logic array KW  signed binary numbers KW  simultaneous multiplication by two digits of the multiplier. VL  24 JA  IEEE Transactions on Computers ER   
A new highspeed cellular logic array for multiplication of signed binary numbers is described. It uses a fourbit arithmetic logic unit MC10181 to achieve high speed and to reduce the number of interconnections. A multiplication algorithm which implements simultaneous multiplication by two digits of the multiplier results in a cellular logic array achieving high speed and involving less equipment. ment. A highspeed 4 X 2 multiplier chip is proposed.
Index Terms:
Fourbit arithmetic logic unit MC10181, highspeed 4 X 2 multiplier chip, multiplication cellular logic array, signed binary numbers, simultaneous multiplication by two digits of the multiplier.
Citation:
C.I. Toma, "Cellular Logic Array for HighSpeed Signed Binary Number Multiplication," IEEE Transactions on Computers, vol. 24, no. 9, pp. 932935, Sept. 1975, doi:10.1109/TC.1975.224340
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