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Design of Asynchronous Sequential Networks Using Read-Only Memories
February 1975 (vol. 24 no. 2)
pp. 195-206
H.A. Sholl, Department of Computer Science, University of Edinburgh
The application of microprogrammed READ-ONLY memories in the design of asynchronous sequential networks is investigated. Variations of single-transition time (STT) state assignments are shown to be applicable to the problem of assigning memory addresses to a memory representation of an asynchronous network. Design algorithms are developed which allow the implementation of an asynchronous sequential network as a READ-ONLY memory. Two operating modes are considered: normal asynchronous operation and a self-clocked mode in which sequential outputs are allowed on a single-input change, thus providing a means of implementing functions normally achieved with synchronous (clocked) networks. In addition the practical timing constraints of the proposed methods are considered.
Index Terms:
Address assignment, asynchronous networks, microprogramming, READ-ONLY memory, single transition time assignment, state assignment.
Citation:
H.A. Sholl, null Shou-Chung Yang, "Design of Asynchronous Sequential Networks Using Read-Only Memories," IEEE Transactions on Computers, vol. 24, no. 2, pp. 195-206, Feb. 1975, doi:10.1109/T-C.1975.224185
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