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The Boolean Difference and Multiple Fault Analysis
January 1975 (vol. 24 no. 1)
pp. 62-71
null Chia-Tai Ku, Department of Reliability Engineering, Stromberg-Carlson Corporation
The Boolean difference is a well-known mathematical concept which has found significant application in the single fault analysis of combinational logic circuits. One of the primary attributes of the Boolean difference in such situations is its completeness. In this paper we extend the Boolean difference concept to cover multiple fault situations. Expressions are developed which give all possible input patterns that can be applied to combinational logic circuits to demonstrate the presence or absence of a specified multiple fault of the stuck-type class. Such expressions are useful in situations where at most, say, p simultaneous faults need be considered, as well as situations where any multiple fault can exist. In addition the expressions developed are also shown to complete some existing single fault analysis concepts.
Index Terms:
Boolean difference, combinational logic circuits, complete test set, minimal test set, multiple fault analysis.
Citation:
null Chia-Tai Ku, G.M. Masson, "The Boolean Difference and Multiple Fault Analysis," IEEE Transactions on Computers, vol. 24, no. 1, pp. 62-71, Jan. 1975, doi:10.1109/T-C.1975.224083
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