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Easily Testable Two-Dimensional Cellular Logic Arrays
November 1974 (vol. 23 no. 11)
pp. 1204-1207
K.K. Saluja, Department of Electrical Engineering. University of Iowa
An algorithm to synthesize two-dimensional AND-EOR arrays is given. The design criterion chosen is to minimize the number of columns in the two-dimensional cellular arrays. It is also shown that And-Eor arrays, synthesized using the algorithm presented, can be modified such that 2n + 5 test vectors will detect any single fault in the array realizing an n-variable function with only one observable output. Furthermore, this test set is shown to be independent of the function being realized by the cellular array under test.
Index Terms:
Cellular arrays, controllable inputs, fault detection, minimization algorithms for cellular arrays, single faults, stuck-at-faults.
Citation:
K.K. Saluja, S.M. Reddy, "Easily Testable Two-Dimensional Cellular Logic Arrays," IEEE Transactions on Computers, vol. 23, no. 11, pp. 1204-1207, Nov. 1974, doi:10.1109/T-C.1974.223831
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