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An Organization for a Highly Survivable Memory
July 1974 (vol. 23 no. 7)
pp. 693-705
J. Goldberg, Computer Science Group, Stanford Research Institute
A memory organization is considered for which a large number of faults can be tolerated at a low cost in redundancy. The primitive element in the memory is a large-scale integrated (LSI) chip that realizes a section of memory, b bits wide by y words long, together with an address decoder for the y words. The chips (including spares) are connected via a switching network so that the memory can be reconfigured effectively in the presence of chip failures. The main results of the paper relating to the switching network are as follows.
Index Terms:
Computer memory, fault tolerance, LSI memory, reconfigurable memory, reliability.
Citation:
J. Goldberg, K.N. Levitt, J.H. Wensley, "An Organization for a Highly Survivable Memory," IEEE Transactions on Computers, vol. 23, no. 7, pp. 693-705, July 1974, doi:10.1109/T-C.1974.224017
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