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July 1974 (vol. 23 no. 7)
pp. 651-657
G.K. Maki, Electrical Engineering Department, University of Idaho
A general design technique for achieving single fault-tolerant asynchronous sequential circuits is described. The design procedures apply over a large range of fault conditions and are extremely easy to use. Generally, less than three times the logic required for a single copy is needed to achieve single fault tolerance. In addition to fault tolerance, real time fault detection is easily achieved and it is immediately known when single fault tolerant capability is exceeded.
Index Terms:
Asynchronous sequential circuits, fault detection, fault tolerant, reliable design, sequential circuits.
Citation:
G.K. Maki, D.H. Sawin, "Fault-Tolerant Asynchronous Sequential Machines," IEEE Transactions on Computers, vol. 23, no. 7, pp. 651-657, July 1974, doi:10.1109/T-C.1974.224013
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