|
| This Article | ||
| | ||
| Share | ||
| Bibliographic References | ||
| Add to: | ||
| | ||
| Search | ||
| ||
January 1974 (vol. 23 no. 1)
pp. 85-86
| ASCII Text | x | ||
| G.L. Tumbush, J.E. Brandeberry, "A State Assignment Technique for Sequential Machines Using J-K Flip-Flops," IEEE Transactions on Computers, vol. 23, no. 1, pp. 85-86, January, 1974. | |||
| BibTex | x | ||
| @article{ 10.1109/T-C.1974.223781, author = {G.L. Tumbush and J.E. Brandeberry}, title = {A State Assignment Technique for Sequential Machines Using J-K Flip-Flops}, journal ={IEEE Transactions on Computers}, volume = {23}, number = {1}, issn = {0018-9340}, year = {1974}, pages = {85-86}, doi = {http://doi.ieeecomputersociety.org/10.1109/T-C.1974.223781}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - A State Assignment Technique for Sequential Machines Using J-K Flip-Flops IS - 1 SN - 0018-9340 SP85 EP86 EPD - 85-86 A1 - G.L. Tumbush, A1 - J.E. Brandeberry, PY - 1974 KW - J-K flip-flop memory KW - sequential machines KW - state assignment. VL - 23 JA - IEEE Transactions on Computers ER - | |||
Several techniques for choosing state assignments which tend to minimize the combinational input and output circuitry of sequential machines have been developed. One of these techniques is a heuristic scoring approach which was originally developed assuming delays as memory elements [1].
Index Terms:
J-K flip-flop memory, sequential machines, state assignment.
Citation:
G.L. Tumbush, J.E. Brandeberry, "A State Assignment Technique for Sequential Machines Using J-K Flip-Flops," IEEE Transactions on Computers, vol. 23, no. 1, pp. 85-86, Jan. 1974, doi:10.1109/T-C.1974.223781
Usage of this product signifies your acceptance of the Terms of Use.

