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A Two's Complement Parallel Array Multiplication Algorithm
December 1973 (vol. 22 no. 12)
pp. 1045-1047
C.R. Baugh, Bell Laboratories
An algorithm for high-speed, two's complement, m-bit by n-bit parallel array multiplication is described. The two's complement multiplication is converted to an equivalent parallel array addition problem in which each partial product bit is the AND of a multiplier bit and a multiplicand bit, and the signs of all the partial product bits are positive.
Index Terms:
Array multiplier, binary multiplication, high-performance multiplication, parallel multiplier, two's complement multiplication.
Citation:
C.R. Baugh, B.A. Wooley, "A Two's Complement Parallel Array Multiplication Algorithm," IEEE Transactions on Computers, vol. 22, no. 12, pp. 1045-1047, Dec. 1973, doi:10.1109/T-C.1973.223648
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