Issue No.04 - April (1972 vol.21)
G. D. Bergland , Bell Telephone Laboratories, Inc., Whippany, N. J. 07981.
For many real-time signal processing problems, correlations, convolutions, and Fourier analysis must be performed in special-purpose digital hardware. At relatively high levels of performance, it becomes necessary for this hardware to perform some of its computations in parallel. A parallel FFT algorithm is described that segments the fast Fourier transform algorithm into groups of identical parallel operations that can be performed concurrently and independently. A hardware implementation of the algorithm is described in the context of the parallel element processing ensemble (PEPE) previously described by Githens , .
G. D. Bergland, "A Parallel Implementation of the Fast Fourier Transform Algorithm", IEEE Transactions on Computers, vol.21, no. 4, pp. 366-370, April 1972, doi:10.1109/TC.1972.5008977