Issue No.01 - January (1972 vol.21)
W.R. Cyre , Center for Informatics Research and the Department of Electrical Engineering, University of Florida
One possible hardware implementation for the fast Fourier transform (FFT) of 2m samples is to have 2m-1 cells, each of which performs two of the necessary computations during each of the m passes through the processor. But in each of these m passes, each of the 2<sup>m-1</sup>cells may require a different multiplier coefficient for its computations. The two most obvious solutions are costly. The m
Cellular processor, Cooley-Turkey algorithm, fast Fourier transform, fast Fourier transform hardware, parallel processing, special-purpose processor.
W.R. Cyre, G.J. Lipovski, "On Generating Multipliers for a Cellular Fast Fourier Transform Processor", IEEE Transactions on Computers, vol.21, no. 1, pp. 83-87, January 1972, doi:10.1109/T-C.1972.223434