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Designing Sets of Fault-Detection Tests ror Combinational Logic Circuits
December 1971 (vol. 20 no. 12)
pp. 1463-1469
This paper is concerned with the problem of determining, by means of terminal experiments, whether a given combinational switching circuit operates correctly or is impaired by some malfunction. We shall be primarily concerned with permanent faults due to component failures. It is assumed that other methods will be employed to protect the circuit against the effects of transient faults. A procedure is presented for the detection of failures in combinational switching circuits. The procedure provides minimal sets of tests for two-level circuits and nearly minimal sets of tests for most multilevel circuits.
Index Terms:
Combinational logic, diagnosis, equivalent normal form, fault detection, path sensitization, testing.
Citation:
Z. Kohavi, D.A. Spires, "Designing Sets of Fault-Detection Tests ror Combinational Logic Circuits," IEEE Transactions on Computers, vol. 20, no. 12, pp. 1463-1469, Dec. 1971, doi:10.1109/T-C.1971.223158
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