This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
H.L. Parks, IEEE
A batch-fabricated three-dimensional coaxial microelectronic interconnection and packaging technique has been developed that is particularly suited to semiconductor chips of all complexities, ranging from single-junction devices to large-scale integrated circuit devices. The interconnections are coaxial in three dimensions, are formed by electrochemically sculpturing copper planes, and are assembled by pressure-stacking the planes to combinatorially interconnect, mount, and remove heat from high-density semiconductor systems. Although initially developed for high-speed digital systems, the technique is generally universally applicable to other disciplines, such as microwave circuits and structures. Circuit and semiconductor chip package densities can be achieved which offer one to three orders of magnitude increased density over conventional packaging systems. The technique is believed the closest to a truly three-dimensional interconnect medium yet achieved that can be nondestructively disassembled for repair, that has the thermal management capabilities required for high-density systems, and that is free of interconnection crosstalk.
Index Terms:
Crosstalk elimination, digital circuit packaging, high-density LSI interconnections, interconnections 3-D shielded, LSI packaging, packaging for high-density circuits, thermal management in high-density packaging.
Citation:
H.L. Parks, "Batch-Fabricated Three-Dimensional Planar Coaxial Interconnections for Microelectronic Systems," IEEE Transactions on Computers, vol. 20, no. 5, pp. 504-511, May 1971, doi:10.1109/T-C.1971.223284
Usage of this product signifies your acceptance of the Terms of Use.