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Issue No.04 - April (1971 vol.20)
pp: 476
D. Horelick , Stanford Linear Accel. Ctr.
ABSTRACT
In the above article<sup>1</sup>Rhyne describes a technique for serial binary to BCD (and BCD to binary) conversion using a single clock pulse per bit, as opposed to the two clock per bit method described earlier by Couleur [1]. Although Rhyne may be correct that his method has not been published in the official "scientific engineering" literature, it turns out that this same method has been publi
INDEX TERMS
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CITATION
D. Horelick, "Comment on "Serial Binary-to-Decimal and Decimal-to-Binary Conversion"", IEEE Transactions on Computers, vol.20, no. 4, pp. 476, April 1971, doi:10.1109/T-C.1971.223276
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