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State Assignments for Asynchronous Sequential Machines
April 1971 (vol. 20 no. 4)
pp. 382-391
In this paper, a heuristic state assignment algorithm for asynchronous sequential machines is presented. Machines realized by this assignment scheme will result in circuits having a small amount of gate inputs and operating in single transition time. It is also shown that for a flow table having m1input columns, m input variables, and d stable states, the number of gate inputs required
Index Terms:
Asynchronous sequential machines, logic circuit realizations, single transition time sequential circuit realizations.
Citation:
null Chung-Jen Tan, "State Assignments for Asynchronous Sequential Machines," IEEE Transactions on Computers, vol. 20, no. 4, pp. 382-391, April 1971, doi:10.1109/T-C.1971.223253
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