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| ASCII Text | x | ||
| T.R.N. Rao, "Biresidue Error-Correcting Codes for Computer Arithmetic," IEEE Transactions on Computers, vol. 19, no. 5, pp. 398-402, May, 1970. | |||
| BibTex | x | ||
| @article{ 10.1109/T-C.1970.222937, author = {T.R.N. Rao}, title = {Biresidue Error-Correcting Codes for Computer Arithmetic}, journal ={IEEE Transactions on Computers}, volume = {19}, number = {5}, issn = {0018-9340}, year = {1970}, pages = {398-402}, doi = {http://doi.ieeecomputersociety.org/10.1109/T-C.1970.222937}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Biresidue Error-Correcting Codes for Computer Arithmetic IS - 5 SN - 0018-9340 SP398 EP402 EPD - 398-402 A1 - T.R.N. Rao, PY - 1970 KW - Biresidue codes KW - multiresidue codes KW - residue codes KW - self-correcting computers KW - separate and nonseparate residue codes KW - syndrome KW - syndrome decoder. VL - 19 JA - IEEE Transactions on Computers ER - | |||
In an earlier paper [11] a scheme for detecting errors in ADD, COMPLEMENT, SHIFT, and ROTATE operations using a residue check circuitry was presented. A scheme for error location and correction in those operations is derived by a suitable application of a code called biresidue arithmetic code described here. Any single error position can be located and also corrected by use of two residue checkers which work separately and in parallel with the arithmetic unit. The estimated cost of redundancy is approximately the same as that required for duplication of the arithmetic unit.
Index Terms:
Biresidue codes, multiresidue codes, residue codes, self-correcting computers, separate and nonseparate residue codes, syndrome, syndrome decoder.
Citation:
T.R.N. Rao, "Biresidue Error-Correcting Codes for Computer Arithmetic," IEEE Transactions on Computers, vol. 19, no. 5, pp. 398-402, May 1970, doi:10.1109/T-C.1970.222937
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