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| ASCII Text | x | ||
| Thomas F. Arnold, Chung-Jen Tan, Monroe M. Newborn, "Iteratively Realized Sequential Circuits," IEEE Transactions on Computers, vol. 19, no. 1, pp. 54-66, January, 1970. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.1970.5008900, author = {Thomas F. Arnold and Chung-Jen Tan and Monroe M. Newborn}, title = {Iteratively Realized Sequential Circuits}, journal ={IEEE Transactions on Computers}, volume = {19}, number = {1}, issn = {0018-9340}, year = {1970}, pages = {54-66}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.1970.5008900}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Iteratively Realized Sequential Circuits IS - 1 SN - 0018-9340 SP54 EP66 EPD - 54-66 A1 - Thomas F. Arnold, A1 - Chung-Jen Tan, A1 - Monroe M. Newborn, PY - 1970 VL - 19 JA - IEEE Transactions on Computers ER - | |||
Synthesis techniques are presented for realizing an arbitrary synchronous flow table in the form of an array of identical modules interconnected in a regular pattern. Several types of structures and their corresponding modules are considered, and a relationship between these structures and earlier work on combinational circuits is shown.
Citation:
Thomas F. Arnold, Chung-Jen Tan, Monroe M. Newborn, "Iteratively Realized Sequential Circuits," IEEE Transactions on Computers, vol. 19, no. 1, pp. 54-66, Jan. 1970, doi:10.1109/TC.1970.5008900
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