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Issue No.12 - December (1969 vol.18)
pp: 1110-1120
ABSTRACT
This paper considers the general problem of the synthesis of asynchronous combinational and sequential circuits based on the assumption that gate delays may be unbounded and that line delays are suitably constrained. Certain problems inherent to circuit realizations with unbounded gate delays are discussed and methods of solving them are proposed. Specific synthesis techniques are presented for both combinational and sequential circuits. The use of completion detection necessitated by the assumption of unbounded gate delays also causes the circuits to stop operating for approximately half of all possible single faults, thus achieving a degree of self-checking.
INDEX TERMS
Asynchronous sequential circuits, combinational circuits, completion detection, unbounded gate delays.
CITATION
D.B. Armstrong, A.D. Friedman, P.R. Menon, "Design of Asynchronous Circuits Assuming Unbounded Gate Delays", IEEE Transactions on Computers, vol.18, no. 12, pp. 1110-1120, December 1969, doi:10.1109/T-C.1969.222594
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