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Logical Design Using Shift Registers
October 1969 (vol. 18 no. 10)
pp. 958-960
W.A. Davis, Communications Res. Center
This correspondence presents a logical design procedure for feedback shift registers, which permits the gating of a common clock signal.
Index Terms:
Logical design, sequential machine, shift register, state assignment.
Citation:
W.A. Davis, "Logical Design Using Shift Registers," IEEE Transactions on Computers, vol. 18, no. 10, pp. 958-960, Oct. 1969, doi:10.1109/T-C.1969.222554
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