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The ILLIAC IV Processing Element
September 1969 (vol. 18 no. 9)
pp. 800-816
R.L. Davis, IEEE
This paper describes the design of the processing element (PE) of I IV, a parallel processing computer consisting of 256 PE's, each with an associated 2048 word memory. Each PE-memory combination with its data-dependent controls is a computer in itself, devoid of those controls common to all PE-memory combinations, such as instruction decoding, instruction look-ahead, etc.
Index Terms:
Computer arithmetic, ILLIAC IV, medium-scale integration, parallel processing.
Citation:
R.L. Davis, "The ILLIAC IV Processing Element," IEEE Transactions on Computers, vol. 18, no. 9, pp. 800-816, Sept. 1969, doi:10.1109/T-C.1969.222777
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