Issue No.08 - August (1969 vol.18)
The binary rate multiplier is a device which has been used for many years in hybrid computing (operational digital techniques) and control systems as a means for generating a pulse train of average frequency proportional to the value of a binary number stored in a register. In general, the pulse spacing is irregular and the number of pulses generated in a given time fluctuates above and below the number which would be produced by a perfectly regular pulse train at the same average frequency. These fluctuations constitute a short-term frequency error, the value of which is an important parameter in the design of pulse rate digital systems incorporating binary rate multipliers. This article analyzes the conditions under which maximum positive and negative errors occur, and expressions are derived from which the magnitude of such errors may be calculated.
Binary rate multiplier, digital control systems, error analysis, hybrid computation, operational digital techniques, pulse rate systems, synthesized pulse trains.
A. Dunworth, "The Error Characteristics of the Binary Rate Multiplier", IEEE Transactions on Computers, vol.18, no. 8, pp. 741-745, August 1969, doi:10.1109/T-C.1969.222757