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Mixed Memory Type Realizations of Sequential Machines
March 1969 (vol. 18 no. 3)
pp. 272-277
In this note, we examine the problem of finding good state assignments when mixed memory type realizations (i.e., including mixtures of delay and trigger flip-flop memories) are permitted. Specifically, we describe situations that take advantage of this extra degree of design freedom, and we indicate how to modify two existing algorithms to determine such mixed realizations systematically.
Index Terms:
Delay memory, flip-flop memory, sequential machines, state assignment.
Citation:
P. Weiner, T.A. Dolotta, "Mixed Memory Type Realizations of Sequential Machines," IEEE Transactions on Computers, vol. 18, no. 3, pp. 272-277, March 1969, doi:10.1109/T-C.1969.222643
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