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January 1969 (vol. 18 no. 1)
pp. 11-22
| ASCII Text | x | ||
| D.L. Dietmeyer, null Yueh-Hsung Su, "Logic Design Automation of Fan-In Limited NAND Networks," IEEE Transactions on Computers, vol. 18, no. 1, pp. 11-22, January, 1969. | |||
| BibTex | x | ||
| @article{ 10.1109/T-C.1969.222521, author = {D.L. Dietmeyer and null Yueh-Hsung Su}, title = {Logic Design Automation of Fan-In Limited NAND Networks}, journal ={IEEE Transactions on Computers}, volume = {18}, number = {1}, issn = {0018-9340}, year = {1969}, pages = {11-22}, doi = {http://doi.ieeecomputersociety.org/10.1109/T-C.1969.222521}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Logic Design Automation of Fan-In Limited NAND Networks IS - 1 SN - 0018-9340 SP11 EP22 EPD - 11-22 A1 - D.L. Dietmeyer, A1 - null Yueh-Hsung Su, PY - 1969 KW - Factoring KW - fan-in limit KW - logic design automation KW - NAND networks KW - synthesis algorithms. VL - 18 JA - IEEE Transactions on Computers ER - | |||
Factoring techniques are incorporated in computer-oriented algorithms for the synthesis of fan-in limited NAND switching networks. Tree networks with reduced gate count or levels of logic are sought. While example FORTRAN programs emphasize computer execution of the algorithms, they are also efficient for hand execution.
Index Terms:
Factoring, fan-in limit, logic design automation, NAND networks, synthesis algorithms.
Citation:
D.L. Dietmeyer, null Yueh-Hsung Su, "Logic Design Automation of Fan-In Limited NAND Networks," IEEE Transactions on Computers, vol. 18, no. 1, pp. 11-22, Jan. 1969, doi:10.1109/T-C.1969.222521
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